I recently came across a Transformer Read-Only Storage (TROS) module that stored microcode in an IBM System/360 mainframe computer.
This unusual storage mechanism used a stack of Mylar sheets to hold 15,360 bits, equivalent to 1920 bytes.
By modern standards, this is an absurdly small amount of data, but in 19641,
semiconductor read-only memory chips weren’t available, so using Mylar sheets for storage was a reasonable solution.
In this blog post, I explain how the TROS module worked and its role in the success of the IBM System/360.
A TROS module, about 15″ (39 cm) long. On the left, 60 transformers pass through the stack of 128 Mylar sheets. (Only the square ends of the transformers are visible.) The sheets are connected to the diode boards on the right. The TROS module is connected to the rest of the computer through the connector cables at the back.
The diagram below shows the concept behind TROS, simplified to two words of three bits each.
The three transformers (square rings) each have a sense winding that generates one bit of output.
Each word (A or B) has a drive line that passes either through a transformer (for a 1 bit) or around a transformer (for a 0 bit).
In the diagram, drive line B (red) is activated by a current pulse. It generates a pulse (blue) from the second and third transformers, generating the
bits 011 for Word B. The wiring for Word A, on the other hand, generates the bits 101.
Storing more words is accomplished by threading more drive lines through (or around) the transformers, one for each word.
Any bit pattern can be stored, depending on how the drive line is wired.
The actual TROS module has 60 transformers and 256 drive lines, so it held 256 words of 60 bits.
Physically threading 256 wires through transformers would be difficult, so the TROS module used a clever technique to make the wiring
easy to assemble or modify.
The wiring was printed on sheets of Mylar (called tapes), essentially a flexible printed circuit board.
Each tape had two loops of wiring (called word lines) that either went through or around the transformers, so 128 Mylar tapes provided the wiring for 256 words.
A Mylar tape, holding 120 bits of data. It consists of two wire loops, connected to the four pins at the bottom.
The Mylar tapes were stacked on the 60 transformers as shown below.
Each of the 60 transformers consisted of a U-shape with both arms passing through the stack of 128 tapes.
In this way, the Mylar tapes efficiently created the wiring through and around the transformers, rather than threading individual wires.
Once the stack was complete, an I-bar was placed on top of each U to close the transformer core.
A sense line (the reddish wiring below) twas wrapped many times around each I-bar to detect the output signal.
Each sense line was connected to a sense amplifier that detected the output signal, to produce the 60-bit output.
(The I-bars and sense lines are missing from the TROS module I have but are visible in the module below.)
The sense windings are wrapped around the I-bars and connected to pins. The I-bars at the bottom are removed, showing the tops of the transformer U-pieces sticking up through the Mylar tapes. This TROS module is in the Computer History Museum.
The Mylar tapes were programmed by punching holes through wires to break the undesired wiring paths.
The photo below shows a closeup of one of the tapes, showing the wiring printed on the tape, the large square holes for the transformer legs,
and the small round holes punched through the word line wiring.
The diagram on the right illustrates the wiring path resulting from the hole pattern.
Each tape has two word lines (indicated in red and green) that
go either through or around each transformer (gray rectangle).
Closeup of a TROS tape. The diagram on the right illustrates how the two traces (red and green) go through or around the transformers (gray rectangles), based on the holes punched in the tape.
To read one of the 256 words, one word line (wire loop) on one particular Mylar tape received a current pulse.
The straightforward implementation would use 256 pulse drivers, with one selected by the address bits,
butthis much hardware would be expensive.
Instead, the TROS module is driven by a “matrix” approach. The 256 word lines are wired logically into a 16×16 matrix. The address is split in half, and each half is decoded to select one of 16 lines.
The word line that is selected on both ends line will receive a current pulse and be activated.2
Each Mylar tape is plugged into a diode board. Note the “2020” on the left, indicating that this module is from a System/360 Model 20.
Each Mylar tape is connected to one of two diode boards, resulting in hundreds of connections (above).
(These diodes prevent the matrixed signals from all shorting together.)
The diodes are inside the square aluminum modules below.
The IBM System/360 didn’t use integrated circuits, but instead used SLT modules,
hybrid modules containing tiny semiconductors and thick
The SLT modules below each contain 8 diodes.
The TROS module I have was used on the low-end System/360 Model 20 computer, according to the label on it.
The Model 20 was a slow, stripped-down system, lacking the full System/360 instruction set.
Even so, its low cost ($1280 per month) made it the most popular System/360 model.
The Model 20 contained 8 TROS modules, holding 6144 micro-instructions (3 micro-instructions per 60-bit word).3
These modules are visible on the left side of the computer below, mounted vertically.
Note that the TROS modules take up a lot of space inside the computer.
In case you’re wondering what the Model 20 microcode looks like, a sample is below.
The microcode itself (in hex) is highlighted in blue, with the mnemonic expansion in green. Comments are on the right.
The Model 20’s microcode is much simpler than the horizontal microcode in larger System/360 systems.4
The micro-operations in the code are “Branch if Zero”, “Add Immediate”, “Branch if Plus”, and “Branch if Minus”, all acting on register R1.
From FEMDM vol 2.
One of the hardest parts of computer design is creating the control logic that tells each part of the processor what
to do to carry out each instruction.
In 1951, Maurice Wilkes came up with the idea of microcode: instead of building the control logic from complex
logic gate circuitry, the control logic could be replaced with code (i.e. microcode) stored in a special memory called a control store.
To execute an instruction, the computer internally executes several simpler micro-instructions, which are specified by the microcode.
With microcode, building the processor’s control logic becomes a programming task instead of a logic design task.
However, in the 1950s, storage technologies weren’t fast and inexpensive enough to make microcode practical.
It wasn’t until the IBM System/360 (1964) that commercial computers made significant use
Microcode played a key role in the success of the System/360,
helping IBM produce a line of computers with the same instruction set architecture but
widely different implementations.
Microcode also simplified backward compatibility, helping the System/360 support instruction sets of older IBM systems.5
IBM’s various read-only storage techniques
IBM used several different read-only storage techniques to store microcode, for a combination of political and technical reasons.
TROS was developed at IBM’s Hursley site in England.
This site started working on microcode because transistors were very expensive in England in the 1950s, and microcode
could reduce the number of transistors required.
Hursley developed a TROS for the SCAMP6 computer. This was followed by the TROS I’ve described,
used on the System/360 Model 20 and Model 40, as well as the IBM 2841 file control unit.
A competing type of read-only storage is CCROS
(Capacitive Coupled Read-Only Storage), which used Mylar sheets that functioned as a matrix of capacitors.
An interesting feature of CCROS is that the Mylar sheets had the same size as an IBM punch card so
microcode could be programmed by punching holes in it with a standard keypunch.
CCROS was developed at IBM’s Endicott site. Because the System/360 Model 30 was developed there too, it used
the locally-developed CCROS even though CCROS was slower and less reliable than TROS.
Each CCROS card holds 12 60-bit words. The Model 30 had 42 CCROS boards, each holding 8 cards, for
a total of 4032 60-bit words.
Detail of a CCROS sheet. It is programmed by punching holes in it with a keypunch.
The high-performance Models 50, 65 and 67 required a faster control store, so they used a third technology, BCROS
(Balanced Capacitor Read-Only Storage).
Like CCROS, BCROS read bits by sensing capacitance, but BCROS
used two capacitors for each bit (the Balanced Capacitors), which helped reduce noise and increased speed.
The Mylar sheets for BCROS were 20″×8½″, much larger than the TROS and CCROS sheets.
The data in BCROS was etched into the copper wiring (below), rather than by punching holes.
Each bit is represented by two squares: one connected to the upper wire and one connected to the lower wire
(or vice versa), forming the balanced capacitors.
Each sheet plane held 176 words of 100 bits, and the system used 16 sheets to provide 2816 words.
Closeup of a BCROS sheet from a System/360 Model 50.
Instead of using special technology to store microcode, the low-end Model 25
held microcode in a 16-kilobyte section of core memory called Control Storage. In this model, different microcode was loaded from a card deck or tape to switch operating modes between System/360 and emulation of the legacy IBM 1400 series.
An important feature of these storage technologies is that the microcode could be easily updated at customer sites,
by swapping the Mylar sheets (or card deck) holding the microcode.
Many system bugs could be fixed inexpensively by changing the microcode. (In comparison, an “engineering change”
on the older IBM 1401 typically required the engineer to modify wiring on the backplane, much more time-consuming
Microcode could also be upgraded if the customer purchased a new feature.
TROS has some similarities with the core rope storage used by the Apollo Guidance Computer (AGC) to store programs,
since both stored read-only data in the pattern of wires through cores.
The tradeoffs were different between core rope and TROS.
The AGC’s core ropes were much more dense than TROS, an important feature for space flight.
However, TROS could be easily changed by replacing the plastic tapes,
while modifying a core rope required an expensive 8-week manufacturing process to wire up a new module.
Detail of core rope memory wiring from an early (Block I) Apollo Guidance Computer. Photo from Raytheon.
TROS and core rope are structurally the opposite, reversing the roles
of word (address) lines and sense lines.
TROS data depended on which word lines went through or around the transformer, while core rope data depended on which sense lines went through or around
To read a word in the AGC, one core was activated, while in TROS all of the transformers were (potentially) activated.
Each transformer in TROS had one sense line and was associated with one output bit.
In contrast, each core in the AGC’s core rope had 192 sense lines and was associated with 12 words.
(I’ve written more on core rope here).
TROS and other read-only storage technologies were a key ingredient in the overwhelming success of the IBM System/360 because they
made microcode practical.
However, the arrival of cheap semiconductor ROMs in the 1970s obsoleted complex storage technologies such as TROS.
Nowadays, most microprocessors still use microcode, but it’s stored in ROM inside the chip instead of in sheets of Mylar.
Microcode can now be patched by downloading a file, rather than replacing Mylar sheets inside the computer.7
The TROS module, showing the diode boards and the stack of 128 Mylar tapes.
Notes and References